The inventive concept relates to the fabricating of semiconductor devices. More particularly, the inventive concept relates to a method of forming a through silicon via (TSV) (hereinafter referred to as ‘TSV’) for connecting a plurality of stacked semiconductor chips.
A typical semiconductor package includes a printed circuit board (PCB) as its basic frame, and a semiconductor chip electrically connected to the PCB via wire or bumps. However, these single chip packages offer limited performance and capacity. Therefore, high-performance semiconductor packages have been developed in which semiconductor chips are stacked vertically within the package. In this respect, 3D packaging techniques for mounting chips one atop the other are actively evolving. A Multi-Chip Package (MCP) or a System-In Package (SIP) is an example of a multi-chip package using a 3D packaging technique. In one 3D packaging technique, vertically stacked semiconductor chips are electrically connected to one another via through silicon via (TSVs) instead of wires or bumps.
TSVs minimize the length of the path along which signals are transmitted to/from a chip in the stack, thereby allowing the bandwidth of the semiconductor package to be maximized. Accordingly, a semiconductor package having chips connected by TSVs possesses excellent electrical characteristics and has a relatively small footprint. Accordingly, it would be desirable to form more stable TSVs to improve a 3D packaging technique.